1. Field of the Invention
The present invention relates in general to an improved data processing system and in particular to an improved method and system for hot-plugging processors in a data processing system. Even more particular, the present invention relates to an improved method and system for adapting a bus system to permit hot-plugging processor adapters in a data processing system.
2. Description of the Related Art
With respect to data processing systems and in particular, personal computers and servers, adapter cards are printed circuit boards that enable the computer to use a peripheral device for which it does not already have the necessary connectors or to permit upgrading of the computer to new or different hardware.
Adapter cards are typically coupled to the remainder of the computer system by the system bus or other adapter buses such as a peripheral component interconnect (PCI) bus. The buses supply power to the adapter cards and send and receive control and data signals to and from the adapter cards from other devices coupled to the system bus and other buses.
In earlier computer systems, all of the adapters had to be connected at the time that the computer was first powered on, in order to properly register (initialize) the devices within the computer's operating system. These devices are checked during the system's power-on self-test (POST), which includes a set of routines stored in the system's read-only memory (ROM) or firmware that test the adapters to see if they are properly connected.
In earlier systems, if an adapter were not present on the bus during the POST, then the adapter would not be recognized if the adapter were later inserted in a slot (while the computer was still running). In addition, the buses make no provision for allowing adapters to be inserted into a powered bus slot. Instead, those systems were required to be "rebooted" in order to be able to communicate with and utilize the later-added devices. "Rebooting" refers to the restarting of a computer system by reloading its most basic program instructions. A system can be rebooted using the software itself (a warm boot) or by actuating the system's hardware, i.e., the reset or power buttons (cold boot). After rebooting, the new adapter can be identified using various known techniques.
Further, the removal of an adapter while power is applied could result in severe degradation to the system in conventional bus systems. In order to remove failed or unneeded adapters, the system must be powered down, the configuration change made, and the system rebooted.
With the advent of "hot-plug" adapters, the configuration of a computer system may be altered without rebooting. Hot-plugging is a feature that allows equipment to be connected to an active device, such as a data processing system, while the device is powered on. Further, hot-plugging preferably provides for equipment to be disconnected from an active device while the device is powered on. In the event of failures, rather than powering down the entire processing system to make replacements, the failed hot-plug adapters are removed and replaced by new hot-plug adapters.
To support hot-plug adapters and others, a data processing system is preferably equipped to handle the addition or removal of adapters without degrading the system. Circuitry is typically implemented which protects the hot-plug adapter from power surges upon installation to a bus. In addition, control logic to handle the addition of a new adapter and integrate the adapter into use by the system is typically provided. Further, the control logic preferably handles the removal of a new adapter and removes the adapter from use by the system.
Much development has been achieved in providing hot-plug adapters for adapter cards such as Personal Computer Memory Card International Association (PCMCIA) cards and others. However, it would be preferable to also provide hot-plug processor adapters which would allow failed processors to be replaced without degrading a system and would allow the addition of processors to a system to improve the data processing ability of the system. The utilization of processor adapters requires a substantial complexity of control in order to maintain the balance of a bus line impedance as will be further described.
FIG. 1 illustrates a prior art schematic diagram of multiple processor cards 11a-11d along a front-side system bus 18, where each processor card 11a-11d preferably comprises a central processing unit (CPU) load of a processor and associated cache. In particular, the bus architecture depicted is an IA-32 Slot2 GTL+ bus with IA-32 slot2 processor cards as is well known in the art. Each processor card 11a-11d is supplied a clock signal, regulated power supply and bus signal through the associated CPU connector 14a-14d. In the embodiment, a clock source 24 provides a 100-133 MHz clock signal to a core chip set 26 and each of CPU connectors 14a-14d in order to regulate cycles of time for each processor. Core chip set 26 may be a PCI host bridge or other type host bridge.
Each processor card 11a-11d and termination card 12 is provided a regulated power supply Vcc by a corresponding CPU voltage regulator module (VRM) 20a-20d. The combination of a particular processor card of processor cards 11a-11d and associated CPU VRM of CPU VRMs 20a-20d forms a processor subsystem. Since processor cards typically comprise a processor with supporting data cache, each CPU VRM 20a-20d contains a core VRM 28a-28d and a L2 VRM 30a-30d where each core VRM 28a-28d regulates Vcc_Core power to the processor and each L2 VRM 30a-30d regulates Vcc_L2 power to the cache associated therewith.
With reference still to FIG. 1, four CPU connectors 14a-14d are illustrated such that one to four processor cards may be supported on a single front-side bus 18. For the GTL+ bus interface in particular, a 25 ohm transmission line termination impedance must be maintained. In order to maintain the required transmission line termination impedance, there are termination resistors distributed along front-side bus 18 where each termination resistor is supplied a voltage Vtt. In particular, front-side bus 18 is terminated at each end by terminating resistors 17a and 17b. Furthermore, for each processor card 11a-11d or termination card 12 connected to front-side bus 18 through CPU connectors 14a-14d, a pull-up resistor 13a-13d within the processor card is included to balance the impedance across front-side bus 18. Termination card 12 provides load balance to maintain the transmission line impedance.
As described, each CPU connector 14a-14d must be filled by a processor card 11a-11d or terminator card 12 in order to maintain the preferred transmission line termination impedance. The configuration is static and cannot be altered during system operation. For example, in order to replace terminator card 12 with an additional processor, the system must be powered down, terminator card 12 removed, the new processor card inserted and the system repowered. The same process is also utilized if an existing processor card fails in order to replace the failed processor card. Only when the system is rebooted is the new processor card integrated into the data processing system.
In the example of FIG. 1 and in other bus architectures, it would be preferable that the processor cards and/or VRM regulators are hot-pluggable in order that the processor configuration may be reconfigured while power is applied to a personal computer or server. As described above, it is important when making changes to a system bus that the bus impedance is maintained.